Provided by: libpfm4-dev_4.13.0+git99-gc5587f9-1_amd64 bug

NAME

       libpfm_intel_tmt - support for Intel Tremont core PMU

SYNOPSIS

       #include <perfmon/pfmlib.h>

       PMU name: tmt
       PMU desc: Intel Tremont

DESCRIPTION

       The library supports the Intel Tremont core PMU.

MODIFIERS

       The following modifiers are supported on Intel Tremont processors:

       u      Measure at user level which includes privilege levels 1, 2, 3. This corresponds to PFM_PLM3.  This
              is a boolean modifier.

       k      Measure at kernel level which includes privilege level 0. This corresponds to PFM_PLM0.  This is a
              boolean modifier.

       i      Invert  the  meaning  of  the  event.  The counter will now count cycles in which the event is not
              occurring. This is a boolean modifier

       e      Enable edge detection, i.e., count only when there is a state transition from no occurrence of the
              event to at least one occurrence. This modifier must be combined with a counter mask modifier  (m)
              with a value greater or equal to one.  This is a boolean modifier.

       c      Set  the  counter  mask  value. The mask acts as a threshold. The counter will count the number of
              cycles in which the number of occurrences of the event is greater or equal to the threshold.  This
              is an integer modifier with values in the range [0:255].

OFFCORE_RESPONSE events

       Intel  Tremont  provides two offcore_response events: OFFCORE_RESPONSE_0 and OFFCORE_RESPONSE_1. The  OCR
       event is aliased to OFFCORE_RESPONSE_0.

       Those events need special treatment in the performance monitoring infrastructure because each event  uses
       an  extra  register  to store some settings. Thus, in case multiple offcore_response events are monitored
       simultaneously, the kernel needs to manage the sharing of that extra register.

       The offcore_response event is exposed as a normal event by the library. The extra settings are exposed as
       regular umasks. The library takes care of  encoding  the  events  according  for  the  underlying  kernel
       interface.

       On  Intel  Tremont,  it  is not possible to combine the request, supplier, snoop, fields anymore to avoid
       invalid combinations. As such, the umasks provided by  the  library  are  the  only  ones  supported  and
       validated.

AUTHORS

       Stephane Eranian <eranian@gmail.com>

                                                   March, 2020                                         LIBPFM(3)